Skyworks Solutions launches NetSync chips for AI data centers
Skyworks Solutions launched the SKY6911x/2x NetSync family on July 23, 2026, for AI data centers. The chips integrate IEEE 1588 PTP and Synchronous Ethernet with ultra-low jitter clocking for 224G/448G SerDes, enabling 800G and 1.6T networking. BGA models are available now; QFN versions arrive in early 2027.

*this image is generated using AI for illustrative purposes only.
Skyworks Solutions, Inc. introduced the SKY6911x/2x family of NetSync network synchronizers on July 23, 2026, addressing the precise timing requirements of AI data centers and high-speed communications infrastructure. The new semiconductor devices enable 800G and 1.6T networking platforms by combining network synchronization features with ultra-low jitter clock generation for 224G and 448G SerDes interfaces. This integration allows system designers to reduce hardware complexity and accelerate product development in fast-moving markets such as scale-across networking.
James Wilson, vice president and general manager for timing at Skyworks, stated that modern network infrastructure requires precise timing alongside increasing data speeds. He noted that the latest NetSync devices bring these capabilities together to help customers significantly reduce system complexity, simplify product development, and accelerate complex system integration. These benefits are increasingly important in fast-moving markets, particularly within AI data center infrastructure where scale-across networking is critical.
Integrated Synchronization Architecture
Traditional timing architectures often require separate hardware devices for synchronization and jitter attenuation, along with third-party software, to implement a complete solution. In contrast, the SKY6911x/2x NetSync family integrates these functions into a single integrated circuit. Working seamlessly with Skyworks’ AccuTime synchronization software, the devices enable optimization of synchronization designs for performance, power consumption, and PCB footprint. This approach greatly reduces the hardware and software design effort required for telecommunications infrastructure, data centers, AI systems, and broadcast video production facilities.
Key capabilities include:
- Ultra-low jitter supporting direct clocking of high-speed serial links, including 224 and 448 Gbps based SerDes.
- Flexible architecture leveraging DSPLL and MultiSynth technologies to simplify reconfigurability for different topologies.
- Standards-based synchronization supporting Synchronous Ethernet and IEEE 1588 PTP packet-based timing.
- Enhanced time-of-day support with high-resolution counters and timestamping for seamless interconnection to third-party clocks.
Software and Availability
The NetSync devices are supported by Skyworks’ AccuTime synchronization software, which incorporates the software-layer aspects of a modern synchronization solution. Features include a full IEEE 1588 (PTP) stack, an advanced time-recovery servo for accurate alignment over noisy networks, and an advanced sync manager for autonomous selection across multiple time sources. The software also includes an AccuTime Assistant GUI to simplify configuration and debugging.
The following BGA-based devices are available now:
| Device Model | Type | Form Factor |
|---|---|---|
| SKY69115 | General purpose network synchronizer | BGA |
| SKY69110 | Centralized network synchronizer with ToD | BGA |
| SKY69120 | Line card network synchronizer with ToD | BGA |
Smaller form factor QFN-based devices — SKY69116, SKY69112, and SKY69122 — are expected to be available in early 2027.
What the Numbers Show
The shift toward integrating synchronization and clocking into a single IC represents a significant architectural change for network equipment manufacturers. By eliminating the need for separate jitter attenuation hardware and third-party software licenses, Skyworks aims to reduce both the bill of materials cost and the engineering time required for certification. The support for 224G and 448G SerDes interfaces directly aligns with the industry’s transition to 800G and 1.6T optical networking standards, positioning these chips as critical components for next-generation AI cluster interconnects.
How might the integration of synchronization and clocking into a single IC impact Skyworks' competitive positioning against rivals like Broadcom or Marvell in the high-speed networking semiconductor market?
What are the potential supply chain implications for AI data center builders given that QFN-based devices, which offer smaller footprints, will not be available until early 2027?
Could the reduction in hardware complexity and engineering time for 800G and 1.6T platforms accelerate the adoption timeline of these next-generation optical networking standards?






























