STMicroelectronics, NUS Launch HELIX Lab For Memory-Centric Edge AI
- STMicroelectronics and NUS launch four-year HELIX Corporate Lab for edge AI
- Research focuses on memory-centric architectures and embodied AI use cases
- Lab uses ST’s P18 18nm FD-SOI technology with embedded Phase Change Memory
- Initiative aims to strengthen Singapore’s semiconductor R&D and talent pool

*this image is generated using AI for illustrative purposes only.
STMicroelectronics (NYSE: STM) and the National University of Singapore (NUS) have launched the HELIX Corporate Lab, a four-year strategic research initiative focused on advancing next-generation edge AI technologies.
The partnership, officially launched on August 24, 2026, aims to enable new generative and embodied AI use cases through system-to-silicon innovation. Supported under the Research, Innovation and Enterprise 2025 plan (RIE2025), the lab is hosted at NUS’ College of Design and Engineering with participation from the School of Computing.
Strategic Focus on Embodied AI
Edge AI processes data directly within or close to a device, enabling faster response times, stronger data privacy, and improved energy efficiency compared to remote cloud infrastructure. HELIX specifically targets embodied AI, where intelligence is built into physical forms such as robots or drones, combining multi-modal sensing, on-device computing, and real-time actuation.
The research will span the full technology stack, from AI models and system architecture to heterogeneous accelerators and silicon implementation. Key technical focuses include:
- Memory-centric architectures
- Innovative in-memory computing
- Scalable compute-and-memory systems
- Advanced silicon and embedded-memory technologies
Technology Infrastructure
STMicroelectronics will provide NUS with a dedicated design chassis implemented in its proprietary P18 18nm Fully Depleted Silicon On Insulator (FD-SOI) technology. This platform integrates ST’s silicon, architecture, integration, and engineering capabilities, offering researchers an industrial-grade foundation for developing and validating new AI accelerator concepts.
The P18 FD-SOI technology enables ultra-low-power operation and adaptive body-biasing. It is paired with embedded Phase Change Memory (PCM), which provides dense, non-volatile storage on the same die alongside the on-chip SRAM hierarchy. Together, these capabilities aim to reduce off-chip data movement, which dominates the energy consumption of memory-bound AI workloads.
Talent and Ecosystem Development
Beyond hardware innovation, the Corporate Lab seeks to strengthen Singapore’s advanced semiconductor research capabilities. The initiative will foster industry-relevant R&D and nurture a new generation of talent in AI systems and chip design.
Laurent Malier, Executive Vice President, Global Technology R&D at STMicroelectronics, stated that the partnership creates an industrially relevant foundation to explore differentiated AI computing technologies and accelerate the translation of promising research into scalable semiconductor solutions.
NUS President Professor Tan Eng Chye emphasized that the collaboration combines academic research strengths with industrial capabilities to build advanced edge AI hardware and define the future of Singapore’s semiconductor and AI industries.
How might the integration of Phase Change Memory with ST's P18 FD-SOI technology influence the competitive landscape for low-power edge AI chips against rivals using standard CMOS processes?
What specific regulatory or ethical frameworks will need to evolve to support the widespread deployment of embodied AI systems developed through this lab?
Could this partnership accelerate Singapore's emergence as a global hub for semiconductor design, potentially attracting further investment from other major chipmakers?


























