Spel Semiconductor Q4FY26 Results: Loss widens to ₹134 lakh

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Reviewed by
Shriram SScanX News Team
Key Highlights
  • Spel Semiconductor reported a Q4FY26 net loss of ₹134.06 lakh, narrowing from ₹558.78 lakh in Q4FY25
  • Revenue from operations plummeted to ₹7.99 lakh as factory operations remain suspended
  • Auditors issued a qualified conclusion citing going concern doubts due to machinery breakdowns and staff resignations
  • The company plans to restart operations via land sales, strategic partnerships, and potential rights issues
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The Board of Directors of Spel Semiconductor approved unaudited financial results for the quarter ended June 30, 2026, reporting a net loss of ₹134.06 lakh. This compares to a net loss of ₹558.78 lakh in the corresponding quarter of the previous year.

Factory operations remain suspended, with revenue primarily representing residual export and other sales. Consequently, income for the period is not comparable with normal operating periods. The Board also fixed the date for the 41st Annual General Meeting (AGM) on September 14, 2026.

Financial Performance

Revenue from operations fell sharply to ₹7.99 lakh in Q4FY26, down from ₹193.39 lakh in Q4FY25. Total income stood at ₹48.28 lakh, driven largely by other income of ₹40.28 lakh. Total expenses were ₹182.34 lakh, including finance costs of ₹61.57 lakh and employee benefit expenses of ₹29.23 lakh.

Metric Q4FY26 (₹ lakh) Q4FY25 (₹ lakh)
Revenue from Operations 7.99 193.39
Other Income 40.28 42.23
Total Expenses 182.34 478.12
Net Loss (134.06) (558.78)

Earnings per share (basic and diluted) were negative at ₹0.29, compared to a loss of ₹1.21 in the prior year quarter. For the full year ended March 31, 2026, the company reported a net loss of ₹2,384.11 lakh against revenue of ₹628 lakh.

What the Numbers Show

Other income accounted for approximately 83% of total income in the quarter, highlighting the negligible contribution from core operations due to suspended factory activities. While the absolute loss narrowed significantly compared to the previous year, this reduction is largely attributable to lower total expenses rather than operational recovery, as revenue from operations dropped by over 95%.

Auditor’s Qualified Conclusion

Statutory auditors Venkatesh & Co issued a qualified conclusion on the interim financial results. They highlighted material uncertainties regarding the company’s ability to continue as a going concern. Key factors include:

  • Incurred losses and negative cash flows during the period and earlier years.
  • Resignation of major employees, leading to significant reduction in staff strength.
  • Breakdown of major plant and machinery, resulting in suspended production activities.
  • Unconfirmed trade receivables of ₹3.91 lakh and payables of ₹339.68 lakh pending reconciliation.

Corporate Actions

The Board scheduled the 41st AGM for September 14, 2026, to be held via Video Conferencing or Other Audio Visual Means. The register of members and share transfer books will remain closed from September 7 to September 14, 2026. Remote e-voting will be available from September 11 to September 13, 2026. The cut-off date for determining voting rights is September 7, 2026.

The company stated it is actively pursuing measures to restart factory operations, including the sale of surplus land, mobilizing funding through financial institutions or investors, partnering with strategic investors, and raising funds through a public rights issue.

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What specific milestones must Spel Semiconductor achieve to remove the 'going concern' qualification from its future audit reports?

How likely is the proposed public rights issue to succeed given the company's suspended operations and negative cash flows?

Will the sale of surplus land provide sufficient liquidity to cover the pending trade payables of ₹339.68 lakh?

Spel Semiconductor approves strategic tripartite MoU with Calsoft and Natronix-India

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Reviewed by
Jubin VScanX News Team
Key Highlights

Spel Semiconductor Limited has formally approved a strategic tripartite Memorandum of Understanding with California Software Company Limited (Calsoft) and Natronix-India. The agreement, ratified on July 29, 2026, focuses on collaborative research, development, and intellectual property creation in semiconductor chips and artificial intelligence. Spel Semiconductor will manage assembly, test, mark, and package operations, while Natronix-India will handle semiconductor IC design and design IP. P. Balamurugan, Head Operations & Whole-Time Director, was authorized to execute the deal.

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Spel Semiconductor has secured board approval for a strategic tripartite Memorandum of Understanding (MOU) with California Software Company Limited (Calsoft) and Natronix-India. The decision was finalized during the company’s 205th Board Meeting held on July 29, 2026, marking a significant step in its collaboration efforts within the semiconductor and artificial intelligence sectors. This agreement establishes a clear division of responsibilities, with Spel Semiconductor handling assembly, test, mark, and package operations, while Natronix-India takes charge of semiconductor IC design and design intellectual property.

The board meeting, which commenced at 11:00 am and concluded at 4:15 pm at the company’s registered office, also authorized P. Balamurugan, Head Operations & Whole-Time Director, to negotiate, finalize, and execute the MOU on behalf of the company. The collaboration aims to foster joint research, development, design, and intellectual property creation focused on semiconductor chips, AI, and related advanced technology solutions.

Strategic Collaboration Details

The tripartite agreement brings together three key entities to leverage their respective strengths in the technology value chain. The specific roles assigned under the MOU are detailed below:

Entity Role in Collaboration
Spel Semiconductor Assembly, Test, Mark, and Package operations
Natronix-India Semiconductor IC design and Design IP
Calsoft Collaborative partner in R&D and advanced tech solutions

Regulatory Compliance and Disclosure

The outcome of the board meeting was disclosed pursuant to Regulation 30 and other applicable provisions of the SEBI (Listing Obligations and Disclosure Requirements) Regulations, 2015. The intimation was submitted to BSE Limited, referencing the earlier notice dated July 27, 2026, which had scheduled the meeting to consider this strategic development.

What the Numbers Show

While financial figures are not disclosed in this procedural filing, the structural division of labor highlights a strategic move towards vertical integration capabilities. By partnering with Natronix-India for IP and design and Calsoft for broader R&D support, Spel Semiconductor is positioning its existing packaging and testing infrastructure within a more comprehensive semiconductor development ecosystem. This alignment suggests a focus on capturing higher value-add activities in the chip manufacturing process beyond traditional OSAT (Outsourced Semiconductor Assembly and Test) services.

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How might this vertical integration strategy impact Spel Semiconductor's revenue margins compared to traditional OSAT services?

What is the expected timeline for the first commercial semiconductor products resulting from the joint IP development with Natronix-India?

Could this collaboration position Spel Semiconductor as a key beneficiary of India's growing domestic semiconductor manufacturing incentives?

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