NVIDIA adds cuPotential to CUDA-X, boosting AI fab simulations
- NVIDIA introduces cuPotential, accelerating atomic-scale simulations by 2-3x
- Lam Research achieves 30x faster wafer-etch modeling using NanoVDB
- KLA accelerates inspection kernels by 50x using NVIDIA NPP
- Applied Materials sees up to 35x speedup in chamber simulations

*this image is generated using AI for illustrative purposes only.
NVIDIA announced new CUDA-X libraries, including the newly introduced cuPotential, to accelerate semiconductor design and manufacturing processes for AI-defined fabs. The update enables partners like Lam Research and KLA to achieve significant speedups in simulation and inspection tasks.
The expansion of the CUDA-X portfolio provides accelerated tools for atomic-scale simulation, 3D data processing, and image analysis. These tools allow engineers to model materials and analyze inspection data more efficiently, helping fabs predict process behavior and improve yield as demand for advanced chips rises.
Accelerating Atomic-Scale Simulation
The new NVIDIA cuPotential library allows developers to build AI agents that simulate how atoms and molecules interact. This is critical for modeling semiconductor materials, a process that traditionally requires significant computational time even on GPU-optimized software.
Synopsys is among the early adopters using cuPotential to accelerate materials simulations. In early-access testing, the library accelerated already GPU-optimized workflows by an additional 2-3x. By making these capabilities available to AI agents, cuPotential helps them run, evaluate, and iterate on advanced molecular simulations faster.
Partner Performance Gains
Several major semiconductor leaders are integrating NVIDIA’s accelerated computing stack into their workflows. The table below summarizes key performance improvements disclosed by partners using specific NVIDIA libraries.
| Partner | Library Used | Application | Performance Gain |
|---|---|---|---|
| Lam Research | NanoVDB | Wafer-etch modeling | Up to 30x faster |
| Synopsys | cuEST | QuantumATK simulations | Potential 30x speedup |
| Synopsys | cuDSS | S-Device benchmarks | 12x speedup |
| Cadence | cuDSS | Advanced package optimization | 8x faster |
| COMSOL | cuDSS | Multiphysics simulations | Up to 10x faster |
| KLA | NPP NCC kernel | Inspection kernels | 50x faster than CPU |
| Teradyne | RAPIDS cuDF | Probe-maintenance inference | Approx. 85x faster |
| Applied Materials | Omniverse/CUDA-X | Chamber simulations | Up to 35x faster |
Lam Research intends to integrate NanoVDB into its SEMulator3D platform, targeting a release by the end of this year. The addition is expected to accelerate select wafer-etch modeling by up to 30x, while NVIDIA PhysicsNeMo has demonstrated reducing plasma-prediction simulation time from days to milliseconds.
Enhancing Inspection and Testing
AI-defined fabs require rapid analysis of inspection images and test data to catch defects and maintain equipment. NVIDIA NPP, a library for processing images on GPUs, and RAPIDS cuDF help accelerate these quality-control workflows.
KLA applied insights from its production kernels to a new NPP NCC kernel, achieving performance levels 50x faster than earlier CPU versions. Teradyne is using NVIDIA NPP and accelerated computing to deliver approximately 85x faster probe-maintenance inference, helping identify degrading probes before they affect yield.
What the Numbers Show
The disclosed performance metrics reveal a divergence in acceleration potential depending on the computational bottleneck. While image processing tasks (KLA’s inspection) and large dataset operations (Teradyne’s probe maintenance) show extreme speedups of 50x and 85x respectively, complex physical simulations show more moderate but still substantial gains of 8x to 30x. This suggests that while GPU acceleration dramatically reduces latency in data-heavy inspection workflows, it primarily compresses timeframes in physics-based modeling rather than eliminating computational complexity entirely.
How might the integration of cuPotential into Synopsys' workflows impact the timeline for next-generation 2nm and sub-2nm chip designs?
What competitive responses are expected from AMD or Intel regarding accelerated semiconductor design tools to counter NVIDIA's CUDA-X ecosystem dominance?
Will the significant yield improvements from AI-driven inspection tools like KLA's NPP kernel lead to measurable reductions in wafer costs for major foundries?

































