Lattice Semiconductor to showcase FPGA innovations at Europe conference
Lattice Semiconductor announced its exhibition plan for the FPGA Conference Europe 2026, taking place from June 30 to July 2 in Munich. The company will host 17 speaker sessions and demonstrations covering low power FPGAs, physical AI, security, and advanced connectivity. Key topics include post-quantum cryptography, Cyber Resilience Act compliance, and sensor fusion for robotics.
*this image is generated using AI for illustrative purposes only.
Lattice Semiconductor is set to demonstrate its latest advancements in low power Field Programmable Gate Arrays (FPGAs) at the upcoming FPGA Conference Europe 2026. The event, taking place from June 30 to July 2 at the NH München Ost Conference Center in Munich, Germany, will feature the company showcasing innovations in physical AI, advanced connectivity, and security technologies. The conference serves as a key platform for specialists in programmable logic devices across datacenters and telecommunications.
The company has outlined a comprehensive schedule of presentations and demo showcases. These sessions will highlight how low power FPGAs are driving innovation across multiple sectors, with a specific focus on systems that sense and act. Key topics include post-quantum cryptography, compliance with the Cyber Resilience Act, and the implementation of physical AI at the sensor level to offload robotic System on Chips (SoCs).
Speaker Sessions and Schedule
Lattice Semiconductor and its partners will conduct numerous technical sessions throughout the three-day event. The agenda includes deep dives into FPGA architecture, design tools, and security solutions.
| Date | Time | Session |
|---|---|---|
| June 30 | 9:45 a.m. | FPGA Verification and Testing by Arrow |
| June 30 | 11:15 a.m. | Trusted Resilience Edge: Unified FPGA-TPM for Post-Quantum Cryptography RED & Cyber Resilience Act |
| June 30 | 12 p.m. | SIPHashIP for Embedded Security: Enabling RED Compliance and CRA Readiness in Smart AR/VR Systems |
| June 30 | 2:15 p.m. | Foundations of FPGA Security and Hardware Identity by Arrow |
| July 1 | 9 a.m. | Solving Your Power Puzzle: Lattice FPGAs' Path to Uncompromised Low Power |
| July 1 | 9:45 a.m. | Unlock Next-Gen SDR Design for SWaP-C Using Lattice FPGAs |
| July 1 | 1:30 p.m. | Security and Physical AI: FPGA Architectures for Systems That Sense and Act |
| July 1 | 5:15 p.m. | Role of Low Power FPGAs in Physical AI – Sensor Fusion, Compute Offloading, and Synchronization |
| July 2 | 9 a.m. | Efficient 360° Threat Detection for Parked Vehicles - A Distributed, Event-Driven Approach |
| July 2 | 9:45 a.m. | Building State of the Art Computer Vision Models for the Far Edge |
| July 2 | 11 a.m. | MIPI CSI-2 to USB 3.2 Video Pipeline with CrossLinkU-NX by Arrow |
| July 2 | 1:30 p.m. | Beyond the "Sledgehammer": Implementing Physical AI at the Sensor to Offload Robotic SoCs |
| July 2 | 2:15 p.m. | Smarter Robotics with Lattice FPGAs: From Vision to Motion |
| July 2 | 2:15 p.m. | Reset Strategies by Arrow |
| July 2 | 3:30 p.m. | Efficient Vision Pipelines on FPGAs: Design Patterns and Performance Tuning |
| July 2 | 4:15 p.m. | Crypto-Factories: Homomorphic Encryption Powers FPGA-Accelerated Confidential Computing for Industrial Edge AI |
| July 2 | 4:15 p.m. | Developing with Propel by Arrow |
Technology Focus Areas
The presentations will address critical industry challenges such as power efficiency and security compliance. Sessions like "Solving Your Power Puzzle" will detail the path to uncompromised low power, while others will explore the use of FPGAs in Software Defined Radio (SDR) design for Size, Weight, Power, and Cost (SWaP-C) constraints. The company will also demonstrate vision pipelines and design patterns for performance tuning on FPGAs.
Lattice Semiconductor positions itself as the low power programmable leader, targeting the Communications, Computing, Industrial, Automotive, and Consumer markets. The company aims to demonstrate how its technology supports the creation of smart, secure, and connected systems from the Edge to the Cloud.
How will Lattice's focus on physical AI at the sensor level impact the competitive landscape for robotic SoC manufacturers?
What are the potential market implications for Lattice if their low-power FPGAs become the standard for post-quantum cryptography compliance?
How might the demonstrated advancements in SWaP-C-constrained SDR designs influence future telecommunications infrastructure investments?
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