IBM, Red Hat, and Deloitte collaborate on Lightwell to secure open source

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Reviewed by
Suketu GScanX News Team
Key Highlights

IBM, Red Hat, and Deloitte have formed a collaboration to enhance open source software supply chain security through the Lightwell initiative. Announced on June 26, 2026, the partnership aims to decouple security remediation from software upgrade cycles by delivering validated patches to production environments. The initiative leverages a $5 billion commitment from IBM and Red Hat and integrates Deloitte's cyber risk services to provide machine-speed vulnerability detection, prioritization, and remediation.

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IBM, Red Hat, and Deloitte have announced a collaboration to strengthen the security of open source software supply chains against automated cyber threats. Announced on June 26, 2026, the partnership integrates Deloitte as an integration collaborator for Lightwell, an initiative designed to decouple open source security remediation from traditional software upgrade cycles. The collaboration aims to deploy validated patches directly to pinned software versions running in production environments, protecting critical systems without forcing disruptive upgrades.

Lightwell combines an enterprise open source security model with an active engineering force to address operational pressure caused by frontier AI models accelerating the discovery of zero-day flaws. The initiative coordinates upstream threat disclosures with independent maintainers while developing, testing, and backporting patches. This builds on the $5 billion commitment from IBM and Red Hat to support Project Lightwell, which previously focused on combining an enterprise security clearinghouse with a global force of engineers.

Operational Coordination

The three organizations will coordinate across the software lifecycle to manage security threats through four key areas:

  • Continuous Visibility & Discovery: Continuously mapping and scanning first-party, open source, and third-party software to identify code location and business function support.
  • Contextual Prioritization: Separating active threats from noise by analyzing severity, exposure, threat-chaining, and exploitability.
  • Machine-Speed Remediation: Combining Red Hat and IBM’s automated patch validation with Deloitte’s orchestration services to rapidly deploy fixes. Deloitte will maintain a bench of Forward Deployed Engineers (FDEs) for ongoing remediation.
  • Ecosystem Trust & Compliance: Managing upstream open source and vendor relationships, including pre-disclosure vulnerability handovers, and delivering evidence-based reporting for regulators.

Strategic Integration

This collaboration extends the capabilities of the OpenAI Daybreak Cyber Partner Program, which IBM joined on June 22, 2026, to integrate advanced frontier AI into enterprise security operations. The new application security service launched by IBM, powered by IBM Consulting Advantage, utilizes OpenAI's cyber capabilities to identify and validate software vulnerabilities. Deloitte's involvement brings its broader secured software supply chain architecture and cyber risk services to this large-scale enterprise model.

Key Initiative Details
Program Name OpenAI Daybreak Cyber Partner Program
New Service Application Security Service
Supporting Platform IBM Consulting Advantage
Strategic Project Project Lightwell
Financial Commitment $5 billion from IBM and Red Hat

Executive Perspectives

"Exploits don't wait for manual patching processes, and neither can enterprise response," said Adnan Amjad, Deloitte’s US Cyber leader. "Together, we're enabling clients to operate at machine speed to identify, validate, and remediate vulnerabilities. This collaboration is about building the operational resilience needed to maintain trust across increasingly complex software ecosystems."

"Lightwell was created to address the growing challenge of securing open source software in an AI-driven threat landscape," said Savio Rodrigues, Vice President, Service Partners at IBM. "We’re excited to collaborate with Deloitte and leverage their capabilities in cyber risk management to extend this model to more organizations."

"Open source drives innovation, but the volume of AI-generated threats requires engineering capacity that matches the speed of the attacker," said Kevin Kennedy, Vice President, Global Partner Ecosystem at Red Hat. "Our work with Deloitte will bring the remediation capabilities we developed with IBM with Lightwell directly to enterprise application environments."

How will the integration of OpenAI's frontier AI models within the Application Security Service influence the accuracy of contextual prioritization compared to traditional methods?

What are the potential regulatory implications for enterprises utilizing automated backporting of patches instead of full software upgrades for compliance reporting?

How might this collaboration pressure other major cloud providers and consulting firms to develop similar machine-speed remediation capabilities?

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IBM debuts world's first sub-1 nanometer chip technology

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Reviewed by
Radhika SScanX News Team
Key Highlights

IBM has unveiled a sub-1 nanometer chip technology at the 0.7 nm node, utilizing a new 3D nanostack architecture to pack nearly 100 billion transistors. The technology offers up to 50% more performance or 70% greater energy efficiency compared to 2 nm chips, with a path to production in the next 5 years.

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IBM has introduced the world's first sub-1 nanometer (nm) chip technology at the 0.7 nm node, featuring a revolutionary three-dimensional nanostack transistor architecture. The technology packs nearly 100 billion transistors onto a fingernail-sized chip, nearly twice the density of IBM's 2 nm chip unveiled in 2021. This advancement offers up to 50% more performance or 70% greater energy efficiency than IBM's 2 nm node chips, addressing the physical limits of traditional chip scaling and supporting high-bandwidth data demands for advanced AI workloads.

Nanostack Architecture and Performance

The new transistor architecture, called "nanostack," is the industry's first known three-dimensional, nanosheet-based design. It vertically stacks and staggers transistors using 3D sequential integration to increase density. The design allows for different material combinations within each stacked layer, optimizing performance and power efficiency independently.

IBM's nanostack architecture was validated through ultra-thin dielectric bonding in CMOS integration, dual-channel engineering capability, and functional CMOS inverter operation. Research presented at VLSI 2026 indicates the architecture provides 40% scaling in SRAM, supporting high-bandwidth data demands for advanced AI workloads.

Roadmap and Production Timeline

IBM's semiconductor roadmap projects at least a decade of future scaling with the nanostack architecture. The technology extends logic technology below the 1 nm node, advancing angstrom-level scaling where dimensions approach atomic sizes. IBM expects the earliest adoption of nanostack technology at the sub-1 nm node, with a path to production in as early as the next 5 years.

Research and Development Context

IBM and its partners conduct this work at a semiconductor research facility in Albany, New York. The facility will soon house a High Numerical Aperture Extreme Ultraviolet (High NA EUV) lithography tool developed by ASML, essential for future logic scaling. Partners including Lam Research Corp., Tokyo Electron (TEL), and SCREEN Semiconductor Solutions, Ltd. are collaborating on new High NA EUV processes and tools.

IBM also announced plans to form Anderon, a standalone pure-play quantum foundry, leveraging its quantum computing and semiconductor expertise. This initiative aims to position the United States to manufacture most of the world's quantum wafers.

How will the integration of ASML's High NA EUV lithography tool at the Albany facility impact the timeline and yield for mass-producing 0.7 nm chips?

What are the potential thermal management challenges associated with vertically stacking nearly 100 billion transistors on a fingernail-sized chip?

How might competitors like TSMC and Samsung respond to IBM's nanostack architecture in their own sub-1 nm roadmaps?

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