SanDisk has signed five additional New Business Model (NBM) agreements, accelerating its commercial momentum following the announcement of five similar deals during its April earnings call. The latest batch includes three NBMs with new customers and two deals that expand upon previously signed NBMs. This rapid succession of signings underscores strong market adoption of the company's evolving business framework, providing immediate visibility into future revenue streams and deepening relationships with existing clients.

The disclosure was made in the context of the company's ongoing commercial updates, highlighting a consistent pipeline of customer commitments. By securing three new customers, SanDisk is broadening its addressable market base, while the two expansion deals indicate that existing partners are increasing their engagement levels. This dual approach of acquisition and expansion suggests a robust demand for the solutions offered under the NBM structure.

Deal Breakdown

The five new agreements are categorized by their nature and customer relationship status as follows:

What the Numbers Show

The pace of deal execution has remained constant since the April earnings call, with five new agreements signed in the interim period matching the five announced previously. This symmetry suggests a steady conversion rate from interest to contract. The mix of three new customers versus two expansions indicates that while retention and upselling are active strategies, acquiring new logos remains the primary driver of volume in this specific cohort of deals. Investors should monitor whether this ratio holds as the company scales further.

SK hynix Inc. and Sandisk Corporation have released the first technical specification for High Bandwidth Flash (HBF) through the Open Compute Project (OCP), establishing a foundational open standard for AI inference memory. Announced on August 3, 2026, the specification defines a new memory layer between High Bandwidth Memory (HBM) and solid-state drives, offering capacities up to 512GB and bandwidths scaling from approximately 0.4TB/s to 3.0TB/s across three performance grades. This development addresses critical bandwidth and capacity scalability challenges in large language models by leveraging NAND technology to deliver high-speed data transfer similar to HBM while significantly expanding storage density.

The standardization effort, completed in just six months since the consortium's launch in February, positions HBF as an interoperable industry solution rather than a proprietary technology. The specification includes system interface standards, electrical guidelines, reliability guidance for HBF die stacks, and software input/output instructions. Crucially, it adopts UCIe (Universal Chiplet Interconnect Express), an open standard interface, allowing flexible integration of HBF technology with various processors, including GPUs and CPUs. This interoperability aims to reduce total cost of ownership and improve token economics for hyperscale data centers optimizing inference workloads.

Technical Specifications

The newly released framework provides detailed parameters for system designers building next-generation AI compute architectures. Key specifications include support for two stack configurations (8-high and 16-high NAND dies) and scalable performance tiers designed to meet diverse workload requirements.

Google and Tenstorrent joined the consortium as members, contributing to technology validation and ecosystem expansion. The open nature of the OCP framework allows system integrators to design around a standardized HBF interface, potentially lowering barriers to entry compared to bespoke vendor-specific implementations.

Industry Events and Product Roadmap

Coinciding with the specification release, SK hynix is presenting its 'Tiered Memory' solutions at the Future of Memory and Storage (FMS) 2026 conference in Santa Clara, California, from August 4 to 6. On August 4, Executive Vice President Kim Chun-sung and Vice President Kang Uk-song will deliver a keynote on orchestrating efficient AI infrastructure through tiered memory architectures. A panel discussion on August 6 will feature representatives from SK hynix, Sandisk, and Google DeepMind, focusing on breaking the memory wall with HBF technology.

Additionally, SK hynix unveiled its tenth-generation (V10) 375-layer 4D NAND wafer at the event. This next-generation product offers a 2.5 times improvement in performance per watt compared to the previous generation, targeting high-efficiency AI infrastructure environments. Mass production of enterprise SSDs based on this architecture is planned for early next year.

What the Numbers Show

The rapid six-month timeline from consortium launch to specification release signals an accelerated pace of standardization in the AI infrastructure sector. By defining clear capacity limits (512GB) and bandwidth tiers (up to 3.0TB/s), the standard provides system architects with predictable performance metrics for designing tiered memory systems. The adoption of the UCIe interconnect standard suggests a strategic shift toward modular, heterogeneous computing designs, where memory and storage components can be optimized independently yet integrated seamlessly. This standardization likely influences future capital expenditure decisions by reducing dependency on single-vendor ecosystems and promoting broader adoption of NAND-based high-bandwidth solutions in inference-heavy workloads.