Keysight and WIN Semiconductors cut GaN MMIC design risk
Keysight Technologies and WIN Semiconductors have launched a joint MMIC design workflow to reduce fabrication risk for GaN components in 5G and defense sectors. The integrated solution automates simulation and verification to ensure first pass tapeout success, targeting a projected $2.77 billion GaN RF device market by 2031.
*this image is generated using AI for illustrative purposes only.
Keysight Technologies and WIN Semiconductors have introduced a joint Monolithic Microwave Integrated Circuit (MMIC) design workflow to reduce fabrication risk for Gallium Nitride (GaN) components used in 5G, satellite, and defense applications. The new workflow connects on-chip multi-domain simulation, 3D layout with verifications, and off-chip MMIC evaluation board design into a single environment. This integration aims to help design houses achieve first pass tapeout success, avoiding the weeks lost to a foundry respin following a failed tapeout.
The workflow automates the full set of simulation, optimization, and verification steps required to sign off on an MMIC design. By ensuring no analysis is skipped before submission to the foundry, the solution addresses a critical bottleneck where customers often delay purchase commitments until performance can be measured on a physical evaluation board. Engineers can now design and optimize on-chip and off-chip components together, ensuring performance meets specifications verified with test equipment.
Market Context and Strategic Importance
With the global GaN RF device market projected to reach $2.77 billion by 2031, the ability to prove performance on an evaluation board is crucial for securing market share. The workflow supports the growing number of companies developing GaN MMICs for 5G base stations, Wi-Fi access points, satellite payloads, and defense radar systems.
Technical Integration
WIN Semiconductors’ latest NP 120P GaN Process Design Kit (PDK) provides MMIC designers with access to process models and layout rules. These models are integrated within Keysight Advanced Design System (ADS) and RF Circuit Simulation Professional to automate the workflow.
| Component | Function |
|---|---|
| WIN NP 120P GaN PDK | Provides process models and layout rules |
| Keysight Advanced Design System (ADS) | Platform for on-chip multi-domain simulation |
| RF Circuit Simulation Professional | Automates simulation and verification steps |
Richard Kuo, Director of Design Service at WIN Semiconductors, stated that the collaboration delivers a customized Layout Versus Schematic (LVS) solution within the WIN ADS PDK. He emphasized that combining Keysight's ADS expertise with WIN's robust PDK and advanced process technology provides a comprehensive verification solution that streamlines the customer design flow.
Nilesh Kamdar, General Manager of EDA and Design Engineering Software at Keysight, noted that WIN's complete PDK combined with Keysight's simulation and verification tools gives designers a single path from chip design through evaluation board. This allows design houses to prove full system performance before fabrication, giving customers the confidence to commit.
How will this joint workflow impact the time-to-market for new 5G and satellite communication products?
Will this partnership pressure other EDA vendors and foundries to develop similar integrated verification solutions?
Could this workflow reduce the overall cost of GaN component development enough to accelerate adoption in commercial sectors?




























